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OverviewDesign for Manufacturability and Yield for Nano-Scale CMOS walks the reader through all the aspects of manufacturability and yield in a nano-CMOS process and how to address each aspect at the proper design step starting with the design and layout of standard cells and how to yield-grade libraries for critical area and lithography artifacts through place and route, CMP model based simulation and dummy-fill insertion, mask planning, simulation and manufacturing, and through statistical design and statistical timing closure of the design. It alerts the designer to the pitfalls to watch for and to the good practices that can enhance a design’s manufacturability and yield. This book is a must read book the serious practicing IC designer and an excellent primer for any graduate student intent on having a career in IC design or in EDA tool development. Full Product DetailsAuthor: Charles Chiang , Jamil KawaPublisher: Springer-Verlag New York Inc. Imprint: Springer-Verlag New York Inc. Edition: 2007 ed. Dimensions: Width: 15.50cm , Height: 1.80cm , Length: 23.50cm Weight: 0.600kg ISBN: 9781402051876ISBN 10: 1402051875 Pages: 255 Publication Date: 26 July 2007 Audience: College/higher education , Professional and scholarly , Postgraduate, Research & Scholarly , Professional & Vocational Format: Hardback Publisher's Status: Active Availability: Out of stock  The supplier is temporarily out of stock of this item. It will be ordered for you on backorder and shipped when it becomes available. Table of ContentsRandom Defects.- Systematic Yield - Lithography.- Systematic Yield - Chemical Mechanical Polishing (CMP).- Variability & Parametric Yield.- Design for Yield.- Yield Prediction.- Conclusions.ReviewsAuthor InformationDr. Charles Chiang is R&D Director of the Advanced Technology Group at Synopsys Inc. in Mountain View, CA, USA Tab Content 6Author Website:Countries AvailableAll regions |
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