Free Delivery Over $100
|
|
|||
|
||||
OverviewDesign for AT-Speed Test, Diagnosis and Measurement is the first book to offer practical and proven design-for-testability (DFT) solutions to chip and system design engineers, test engineers and product managers at the silicon level as well as at the board and systems levels. Designers will see how the implementation of embedded test enables simplification of silicon debug and system bring-up. Test engineers will determine how embedded test provides a superior level of at-speed test, diagnosis and measurement without exceeding the capabilities of their equipment. Product managers will learn how the time, resources and costs associated with test development, manufacture cost and lifecycle maintenance of their products can be significantly reduced by designing embedded test in the product. A complete design flow and analysis of the impact of embedded test on a design makes this book a `must read' before any DFT is attempted. Full Product DetailsAuthor: Benoit Nadeau-DostiePublisher: Springer-Verlag New York Inc. Imprint: Springer-Verlag New York Inc. Edition: Softcover reprint of the original 1st ed. 2000 Volume: 15 Dimensions: Width: 17.80cm , Height: 1.40cm , Length: 25.40cm Weight: 0.500kg ISBN: 9781475782912ISBN 10: 1475782918 Pages: 239 Publication Date: 26 April 2013 Audience: Professional and scholarly , Professional & Vocational Format: Paperback Publisher's Status: Active Availability: Manufactured on demand  We will order this item for you from a manufactured on demand supplier. Table of ContentsTechnology Overview.- Memory Test and Diagnosis.- Logic Test and Diagnosis.- Embedded Test Design Flow.- Hierarchical Core Test.- Test and Measurement for PLLs and ADCs.- System Test and Diagnosis.- System Reuse of Embedded Test.ReviewsAuthor InformationTab Content 6Author Website:Countries AvailableAll regions |
||||
