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OverviewComprehensive and self-contained, this text covers the design of various arithmetic circuits using Verilog HDL for fixed-point, decimal, and floating-point number representations. It contains examples using different algorithms for both combinational and clocked sequential arithmetic circuits. The text presents topics in computer arithmetic, such as residue checking, parity prediction, logical and algebraic shifters, and arithmetic and logic units (ALUs). The text also features Verilog HDL projects which include the design module implemented using built-in primitives, dataflow, behavioral, or structural modeling, the test bench module, the outputs, and the waveforms obtained from the simulator to illustrate complete functional design operation. All designs are carried through to completion. Full Product DetailsAuthor: Joseph Cavanagh (Santa Clara University, California, USA)Publisher: Taylor & Francis Inc Imprint: CRC Press Inc Dimensions: Width: 17.80cm , Height: 4.80cm , Length: 25.40cm Weight: 1.973kg ISBN: 9781439811245ISBN 10: 1439811245 Pages: 972 Publication Date: 24 November 2009 Audience: College/higher education , General/trade , Tertiary & Higher Education , General Format: Hardback Publisher's Status: Active Availability: In Print  This item will be ordered in for you from one of our suppliers. Upon receipt, we will promptly dispatch it out to you. For in store availability, please contact us. Table of ContentsNumber Systems and Number Representations. Logic Design Fundamentals. Introduction to Verilog HDL. Fixed-Point Addition. Fixed-Point Subtraction. Fixed-Point Multiplication. Fixed-Point Division. Decimal Addition. Decimal Subtraction. Decimal Multiplication. Decimal Division. Floating-Point Addition. Floating-Point Subtraction. Floating-Point Multiplication. Floating-Point Division. Additional Floating-Point Topics. Additional Topics in Computer Arithmetic. Appendices. Index.ReviewsCavanagh has provided readers with a very large work on the topics of addition, subtraction, multiplication, and division. ! The student who completes a course based on this work will have achieved a great deal. Summing Up: Recommended. --CHOICE, June 2010 Author InformationJoseph Cavanagh is an adjunct professor in the computer engineering department at Santa Clara University in California. Tab Content 6Author Website:Countries AvailableAll regions |
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