Free Delivery Over $100
|
|
|||
|
||||
OverviewThis text presents techniques that are useful in building complex embedded systems. These techniques provide a competitive advantage over purely hardware or software implementations of time-constrained embedded systems. Recent advances in chip-level synthesis have made it possible to synthesize application-specific circuits under strict timing constraints. This work advances the state of the art by formulating the problem of system synthesis using both application-specific as well as reprogrammable components, such as off-the-shelf processors. Timing constraints are used to determine what part of the system functionality must be delegated to dedicated application-specific hardware while the rest is delegated to software that runs on the processor. This co-synthesis of hardware and software from behavioural specifications makes it possible to realize real-time embedded systems using off-the-shelf parts and a relatively small amount of application-specific circuitry that can be mapped to semi-custom VLSI such as gate arrays. The ability to perform detailed analysis of timing performance provides the opportunity of improving the system definition by creating better phototypes. Full Product DetailsAuthor: Rajesh Kumar GuptaPublisher: Springer Imprint: Springer Edition: 1995 ed. Volume: 329 Dimensions: Width: 15.50cm , Height: 1.70cm , Length: 23.50cm Weight: 1.290kg ISBN: 9780792396130ISBN 10: 0792396138 Pages: 266 Publication Date: 31 August 1995 Audience: College/higher education , Professional and scholarly , Postgraduate, Research & Scholarly , Professional & Vocational Format: Hardback Publisher's Status: Active Availability: In Print  This item will be ordered in for you from one of our suppliers. Upon receipt, we will promptly dispatch it out to you. For in store availability, please contact us. Table of Contents1 Introduction.- 1.1 Design of Embedded Systems.- 1.2 Synthesis Solutions.- 1.3 Co-design and Co-synthesis.- 1.4 Motivations for Hardware-Software Co-synthesis.- 1.5 Applications.- 1.6 The Opportunity of Co-synthesis.- 1.7 Scope and Contributions.- 1.8 Outline of the Book.- 2 Related Work.- 2.1 CAD Systems for Hardware-Software Co-design.- 2.2 CAD for Hardware-Software Co-synthesis.- 3 System Modeling.- 3.1 System Specification using Procedural HDL.- 3.2 System Model and its Representation.- 3.3 The Flow Graph Model.- 3.4 Interaction Between System and its Environment.- 3.5 ND,Execution Rate and Communication.- 3.6 Constraints.- 3.7 Summary.- 4 Constraint Analysis.- 4.1 Scheduling of Operations.- 4.2 Deterministic Analysis of Min/max Delay Constraints.- 4.3 Deterministic Analysis of Execution Rate Constraints.- 4.4 Constraints Across Graph Models.- 4.5 ND Cycles in A Constraint Graph.- 4.6 Probabilistic Analysis of Min/max and Rate Constraints.- 4.7 Flow Graph as a Stochastic Process.- 4.8 Summary.- 5 Software and Runtime Environment.- 5.1 Processor Cost Model.- 5.2 A Model for Software and Runtime System.- 5.3 Estimation of Software Performance.- 5.4 Estimation of Software Size.- 5.5 Software Synthesis.- 5.6 Step I: Generation of Program Threads.- 5.7 Step II: Generation of Program Routines.- 5.8 Step III: Code Synthesis.- 5.9 Issues in Code Synthesis from Program Routines.- 5.10 Summary.- 6 System Partitioning.- 6.1 Partition Cost Model.- 6.2 Local versus Global Properties.- 6.3 Partitioning Feasibility.- 6.4 Partitioning Based on Separation of Control and Execute Procedures.- 6.5 Partitioning Based on Division of ND Operations.- 6.6 Partition Related Transformations.- 6.7 Summary.- 7 System Implementation.- 7.1 Vulcan System Implementation.- 7.2 Implementation of Target Architecture in Vulcan.- 7.3 Co-simulation Environment.- 7.4 Summary.- 8 Examples and Results.- 8.1 Graphics Controller.- 8.2 Network Controller.- 9 Summary, Conclusions, and Future Work.- 9.1 Future Work.- References.ReviewsAuthor InformationTab Content 6Author Website:Countries AvailableAll regions |
||||
