Overview

This book introduces a novel perspective on machine learning, offering distinct advantages over neural network-based techniques. This approach boasts a reduced hardware requirement, lower power consumption, and enhanced interpretability. The applications of this approach encompass high-speed classifications, including packet classification, network intrusion detection, and exotic particle detection in high-energy physics. Moreover, it finds utility in medical diagnosis scenarios characterized by small training sets and imbalanced data. The resulting rule generated by this method can be implemented either in software or hardware. In the case of hardware implementation, circuit design can employ look-up tables (memory), rather than threshold gates. The methodology described in this book involves extracting a set of rules from a training set, composed of categorical variable vectors and their corresponding classes. Unnecessary variables are eliminated, and the rules are simplified before being transformed into a sum-of-products (SOP) form. The resulting SOP exhibits the ability to generalize and predict outputs for new inputs. The effectiveness of this approach is demonstrated through numerous examples and experimental results using the University of California-Irvine (UCI) dataset. This book is primarily intended for graduate students and researchers in the fields of logic synthesis, machine learning, and data mining. It assumes a foundational understanding of logic synthesis, while familiarity with linear algebra and statistics would be beneficial for readers.

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9783031353499

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Tsutomu Sasao received B.E., M.E., and Ph.D. degrees in Electronics Engineering from Osaka University, Osaka Japan, in 1972, 1974, and 1977, respectively. He has held faculty/research positions at Osaka University, Japan; IBM T. J. Watson Research Center, Yorktown Height, NY; the Naval Postgraduate School, Monterey, CA; Kyushu Institute of Technology, Japan; and Meiji University, Kawasaki, Japan. Currently, he is a visiting researcher of Meiji University, Japan. He is a Life Fellow of the IEEE, and has published many books on logic design.

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