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OverviewAccording to the Semiconductor Industry Association's 1999 International Technology Roadmap for Semiconductors, by the year 2008 the integration of more than 500 million transistors will be possible on a single chip. Integrating transistors on silicon will depend increasingly on design reuse. Design reuse techniques have become the subject of books, conferences, and podium discussions, with most focusing on higher-level abstraction like RTL descriptions, which can be synthesized. Design reuse is often seen as an add-on to normal design activity, or a special design task that is not an integrated part of the existing design flow. This may all be true for the ASIC world, but not for high-speed, high-performance microprocessors. In the field of high-speed microprocessors, design reuse is an integrated part of the design flow. The method of choice in this demanding field was, and is always, physical design reuse at the layout level. In the past, the practical implementations of this method were linear shrinks and the lambda approach. With the scaling of process technology down to 0.8 micron and below, this approach lost steam and became inefficient. The only viable solution is a method called Automatic Layout Modification (ALM), which combines compaction, mask manipulation, and correction with powerful capabilities. This text is a comprehensive reference work on the subject. Full Product DetailsAuthor: Michael ReinhardtPublisher: Springer-Verlag New York Inc. Imprint: Springer-Verlag New York Inc. Edition: 2002 ed. Dimensions: Width: 15.60cm , Height: 1.40cm , Length: 23.40cm Weight: 1.150kg ISBN: 9781402070914ISBN 10: 1402070918 Pages: 226 Publication Date: 30 June 2002 Audience: College/higher education , Professional and scholarly , Postgraduate, Research & Scholarly , Professional & Vocational Format: Hardback Publisher's Status: Active Availability: In Print This item will be ordered in for you from one of our suppliers. Upon receipt, we will promptly dispatch it out to you. For in store availability, please contact us. Table of Contentsto IC Physical Design Reuse.- Physical Design Reuse In The SOC Era: Luxury or Necessity?.- Boosting Design Capabilities with Automatic Layout Modification Technology.- Characteristics and Functionalities of an Automatic Layout Modification Tool Suite.- Integrating Automatic Layout Modification and Physical Design Reuse into Existing Design Flows.- Applying Physical Design Reuse to Different Design Types with Automatic Layout Modification Technology.- Layout Guidelines for Physical Design Reuse and Automatic Layout Modification.- Guide to Physical Design Reuse Tools: Uses and Functions.- General Layout Modification Design Flow as Applied to the Alpha CPU Migration.- Aspects of Memory Conversion Projects.- Aspects of Library Conversion Projects.ReviewsAuthor InformationTab Content 6Author Website:Countries AvailableAll regions |