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OverviewSuccessful ASIC development requires desginers to follow a rigorous specification and design process. This volume describes the process MCCE methodology, employing studies of successful ASIC designs of different levels of complexity to give readers practical understanding of the development process and its benefits. VHDL is used as a tool to model circuits of various abstraction levels to allow simulation of ASIC behaviour at each step. VHDL is also used to generate the chip design at gate level by synthesis. A practical guide and reference for ASIC designers project managers, teachers and advanced students, it should be of interest to electronic engineers in integrated circuit specification, design and application technical managers, university researchers and PhD students and MSc/short course attendees of ASIC design and development. Full Product DetailsAuthor: Jean Paul CalvezPublisher: Chapman and Hall Imprint: Chapman and Hall Weight: 0.333kg ISBN: 9780412613609ISBN 10: 0412613603 Pages: 500 Publication Date: 01 July 1996 Audience: College/higher education , Professional and scholarly , Undergraduate , Postgraduate, Research & Scholarly Format: Hardback Publisher's Status: Active Availability: In Print  This item will be ordered in for you from one of our suppliers. Upon receipt, we will promptly dispatch it out to you. For in store availability, please contact us. Table of ContentsObjectives and tools. Models and design process. Specification and functional design. Architectural design. Implementation. Examples.ReviewsAuthor InformationTab Content 6Author Website:Countries AvailableAll regions |
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