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OverviewFull Product DetailsAuthor: Cyrille Chavet , Philippe CoussyPublisher: Springer International Publishing AG Imprint: Springer International Publishing AG Edition: Softcover reprint of the original 1st ed. 2015 Dimensions: Width: 15.50cm , Height: 1.10cm , Length: 23.50cm Weight: 3.168kg ISBN: 9783319355108ISBN 10: 3319355104 Pages: 192 Publication Date: 23 August 2016 Audience: Professional and scholarly , Professional & Vocational Format: Paperback Publisher's Status: Active Availability: Manufactured on demand  We will order this item for you from a manufactured on demand supplier. Table of ContentsUser Needs.- Challenges and Limitations for Very High Throughput Decoder Architectures for Soft-Decoding.- Implementation of Polar Decoders.- Parallel architectures for Turbo Product Codes Decoding.- VLSI implementations of sphere detectors.- Stochastic Decoders for LDPC Codes.- MP-SoC/NoC architectures for error correction.- ASIP design for multi-standard channel decoders.- Hardware design of parallel interleaver architecture: a survey.ReviewsAuthor InformationCyrille Chavet is an Associate Professor at Associate Professors at Université de Bretagne Sud, Lorient, France. Philippe Coussy is an Associate Professor at Associate Professors at Université de Bretagne Sud, Lorient, France. Tab Content 6Author Website:Countries AvailableAll regions |
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