Advanced ASIC Chip Synthesis: Using Synopsys® Design Compiler™ Physical Compiler™ and PrimeTime®

Author:   Himanshu Bhatnagar
Publisher:   Springer
Edition:   2nd ed. 2002
ISBN:  

9780792376446


Pages:   328
Publication Date:   31 December 2001
Format:   Hardback
Availability:   Out of print, replaced by POD   Availability explained
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Advanced ASIC Chip Synthesis: Using Synopsys® Design Compiler™ Physical Compiler™ and PrimeTime®


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Overview

This volume describes the advanced concepts and techniques used towards ASIC chip synthesis, physical synthesis, formal verification and static timing analysis, using the Synopsys suite of tools. In addition, the ASIC design flow methodology targeted for VDSM (Very-Deep-Sub-Micron) technologies is examined. The emphasis of this book is on real-time application of Synopsys tools, used to combat various problems seen at VDSM geometries. It includes a design methodology for handling complex, sub-micron ASIC designs. Significance is placed on HDL coding styles, synthesis and optimization, dynamic simulation, formal verification, DFT scan insertion, links to layout, physical synthesis, and static timing analysis. At each step, problems related to each phase of the design flow are identified, with solutions and work-around described. In addition, issues related to layout, which includes clock tree synthesis and back-end integration (links to layout) are also discussed. This book also contains discussions on the basis of Synopsys technology libraries and HDL coding styles, targeted towards optimal synthesis solution.

Full Product Details

Author:   Himanshu Bhatnagar
Publisher:   Springer
Imprint:   Springer
Edition:   2nd ed. 2002
Dimensions:   Width: 15.60cm , Height: 2.00cm , Length: 23.40cm
Weight:   1.520kg
ISBN:  

9780792376446


ISBN 10:   0792376447
Pages:   328
Publication Date:   31 December 2001
Audience:   College/higher education ,  Professional and scholarly ,  Postgraduate, Research & Scholarly ,  Professional & Vocational
Format:   Hardback
Publisher's Status:   Active
Availability:   Out of print, replaced by POD   Availability explained
We will order this item for you from a manufatured on demand supplier.

Table of Contents

Asic Design Methodology.- Tutorial.- Basic Concepts.- Synopsys Technology Library.- Partitioning and Coding Styles.- Constraining Designs.- Optimizing Designs.- Design for Test.- Links to Layout and Post Layout Optimization.- Physical Synthesis.- SDF Generation.- PrimeTime Basics.- Static Timing Analysis.

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