Overview

75th Anniversary of the Transistor 75th anniversary commemorative volume reflecting the transistor's development since inception to current state of the art 75th Anniversary of the Transistor is a commemorative anniversary volume to celebrate the invention of the transistor. The anniversary volume was conceived by the IEEE Electron Devices Society (EDS) to provide comprehensive yet compact coverage of the historical perspectives underlying the invention of the transistor and its subsequent evolution into a multitude of integration and manufacturing technologies and applications. The book reflects the transistor's development since inception to the current state of the art that continues to enable scaling to very large-scale integrated circuits of higher functionality and speed. The stages in this evolution covered are in chronological order to reflect historical developments. Narratives and experiences are provided by a select number of venerated industry and academic leaders, and retired veterans, of the semiconductor industry. 75th Anniversary of the Transistor highlights: Historical perspectives of the state-of-the-art pre-solid-state-transistor world (pre-1947) leading to the invention of the transistor Invention of the bipolar junction transistor (BJT) and analytical formulations by Shockley (1948) and their impact on the semiconductor industry Large scale integration, Moore's Law (1965) and transistor scaling (1974), and MOS/LSI, including flash memories — SRAMs, DRAMs (1963), and the Toshiba NAND flash memory (1989) Image sensors (1986), including charge-coupled devices, and related microsensor applications With comprehensive yet succinct and accessible coverage of one of the cornerstones of modern technology, 75th Anniversary of the Transistor is an essential reference for engineers, researchers, and undergraduate students looking for historical perspective from leaders in the field.

Full Product Details

Author:   Arokia Nathan (University of Cambridge; Darwin College, Cambridge, UK) ,  Samar K. Saha (Prospicient Devices, Milpitas, CA, USA) ,  Ravi M. Todi (President, IEEE EDS, USA)
Publisher:   John Wiley & Sons Inc
Imprint:   Wiley-IEEE Press
Dimensions:   Width: 18.30cm , Height: 2.80cm , Length: 25.70cm
Weight:   1.043kg
ISBN:  

9781394202447

ISBN 10:   139420244
Pages:   464
Publication Date:   14 July 2023
Audience:   Professional and scholarly ,  Professional & Vocational
Format:   Hardback
Publisher's Status:   Active
Availability:   Out of stock  
The supplier is temporarily out of stock of this item. It will be ordered for you on backorder and shipped when it becomes available.

Table of Contents

Editor Biography xiii Preface xv 1 The First Quantum Electron Device 1 Leo Esaki 2 IEEE Electron Devices Society: A Brief History 3 Samar K. Saha 2.1 Introduction 3 2.2 Origins of EDS 4 2.3 Growth of EDS 6 2.4 Publications 10 2.5 Conferences 12 2.6 Awards and Recognition 14 2.7 Conclusion 14 3 Did Sir J.C. Bose Anticipate the Existence of p- and n-Type Semiconductors in His Coherer/Detector Experiments? 17 Prasanta Kumar Basu 3.1 Introduction 17 3.2 J.C. Bose: A Brief Biography 18 3.3 Bose's Work on Detectors 19 3.4 Mott's Remark 21 3.5 Understanding Semiconductors and Doping 21 3.6 Interpretation of Mott's Remark 23 3.7 Conclusion 25 4 The Point-Contact Transistor: A Revolution Begins 29 John M. Dallesasse and Robert B. Kaufman 4.1 Introduction 29 4.2 Background and Motivation 30 4.3 Inventors' Understanding How a Point-Contact Transistor Operates 31 4.4 Recreating the Point-Contact Transistor 33 4.5 Concluding Remarks 40 5 On the Shockley Diode Equation and Analytic Models for Modern Bipolar Transistors 43 T. H. Ning 5.1 Introduction 43 5.2 Adaptation of Shockley Diode Equation to Modern Bipolar Transistors 45 5.3 Modern Bipolar Transistors Structures 46 5.4 Analytic Models for Modern Bipolar Transistors 48 5.5 Discussion 49 6 Junction-Less Field Effect Transistors: The First Transistor to be Conceptualized 51 Mamidala Jagadesh Kumar and Shubham Sahay 6.1 Introduction 51 6.2 Structure and Operation 52 6.3 Salient Features of JLFETs 55 6.4 Challenges for JLFETs 58 6.5 Unconventional Applications of JL Architecture 59 6.6 Conclusions 61 7 The First MOSFET Design by J. Lilienfeld and a Long Journey to Its Implementation 65 Hiroshi Iwai 7.1 Introduction 65 7.2 Demand for the Development of the Solid-State Amplifier and Its Difficulty 66 7.3 Grid-Inserted MESFETs 68 7.4 Lilienfeld Patents for the MESFET and MOSFET 69 7.5 Necessary Conditions for Successful MOSFET Operation, and MOSFET Development Chronology 72 7.6 Status of the Semiconductor Physics at the Lilienfeld Period (in the 1920s) and Thereafter 73 7.7 Improvement of Si and Ge Material Quality and Discovery of the pn Junction in the 1940s 74 7.8 H. Welker's MISFET with Inversion Channel in 1945 75 7.9 Shockley's Group Study for MOSFET from 1945 to 1947 76 7.10 Technology Development in the 1950s Until the Successful MOSFET Operation in 1960 79 7.11 Success of MOSFET Operation by D. Kahng and M. Attala in 1960 81 7.12 After the First Successful Operation of the MOSFET 82 7.13 Summary and Conclusions 82 8 The Invention of the Self-Aligned Silicon Gate Process 89 Robert E. Kerwin 9 The Application of Ion Implantation to Device Fabrication: The Early Days 95 Alfred U. MacRae 9.1 Introduction 95 9.2 Device Fabrication 96 9.3 Summary 99 10 Evolution of the MOSFET: From Microns to Nanometers 101 Yuan Taur 10.1 Introduction 101 10.2 The Early Days: Before 1980 102 10.3 From 1980 to 2000 103 10.4 The Latest: After 2000 109 10.5 Conclusion 113 11 The SOI Transistor 115 Sorin Cristoloveanu 11.1 The Beginnings 115 11.2 The Renaissance 116 11.3 The Smart-Cut Dynasty 119 11.4 Special Mechanisms in FD-SOI MOSFET 122 11.5 A Selection of Innovating Devices 126 11.6 The Future 130 12 FinFET: The 3D Thin-Body Transistor 135 Chenming Hu 12.1 The Show Stopper 135 12.2 The Cause of the Power Crises 135 12.3 The Real Cause of the Power Crises 137 12.4 A DARPA Request for Proposal 138 12.5 The Challenges and Team Work 139 12.6 Further Advancements by Industry 141 12.7 Conclusion 144 13 Historical Perspective of the Development of the FinFET and Process Architecture 145 Digh Hisamoto 13.1 Introduction 145 13.2 Requirements for the End of CMOS Scaling 146 13.3 Restrictions of Planar Process Technology 148 13.4 Prompted Device/Process Technology Evolution by FinFET 151 13.5 Conclusion 152 14 The Origin of the Tunnel FET 155 Gehan A. J. Amaratunga 14.1 Background 155 14.2 Conception 156 14.3 Realization 157 14.4 Relevance 159 14.5 Prospects 159 15 Floating-Gate Memory: A Prime Technology Driver of the Digital Age 163 S. M. Sze 15.1 Introduction 163 15.2 The Charge-Storage Concept 164 15.3 Early Device Structures 167 15.4 Multi-Level Cells and 3D Structures 169 15.5 Applications 171 15.6 Scaling Challenges 173 15.7 Alternative Structures 174 15.8 Conclusion 175 16 Development of ETOX NOR Flash Memory 179 Stefan K. Lai 16.1 Introduction 179 16.2 Background 179 16.3 Not the Perfect Solution 181 16.4 ETOX Development Challenges 182 16.5 Building a Business 183 16.6 Closing Words 184 17 History of MOS Memory Evolution on DRAM and SRAM 187 Mitsumasa Koyanagi 17.1 Introduction 187 17.2 Revolutionary Technologies in DRAM History 187 17.3 Revolutionary Technologies in SRAM History 202 17.4 Summary 210 18 Silicon-Germanium Heterojunction Bipolar Transistors: A Retrospective 215 Subramanian S. Iyer and John D. Cressler 18.1 Introduction (JDC) 215 18.2 Some History from Early Days at IBM Research (SSI) 218 18.3 SiGe Epitaxy and Making the First SiGe Transistor (SSI) 221 18.4 MBE vs. UHV/CVD vs. APCVD for SiGe epi (SSI) 224 18.5 Putting Physics to Work - The Properties of SiGe HBTs (JDC) 225 18.6 SiGe BiCMOS: Devices to Circuits to Systems (JDC and SSI) 228 18.7 Using SiGe in Extreme Environments (JDC) 231 18.8 New Directions (JDC and SSI) 234 18.9 Some Parting Words (SSI) 235 19 The 25-Year Disruptive Path of InP/GaAsSb Double Heterojunction Bipolar Transistors 239 Colombo R. Bolognesi 19.1 Introduction 239 19.2 Phase I: Simon Fraser Years (1995-2006) 242 19.3 Phase II: ETH Years (2006-2022) 246 19.4 Response to Innovation 248 19.5 Final Words 249 20 The High Electron Mobility Transistor: 40 Years of Excitement and Surprises 253 Jesús A. del Alamo 20.1 Introduction 253 20.2 HEMT Electronics 254 20.3 Modulation-Doped Structures in Physics 257 20.4 Exciting Prospects 258 20.5 Conclusions 259 21 The Thin Film Transistor and Emergence of Large Area, Flexible Electronics and Beyond 263 Yue Kuo, Jin Jang, and Arokia Nathan 21.1 Birth of Large Area Electronics 263 21.2 Polycrystalline Silicon and Oxide Thin Film Transistor 265 21.3 Trends in TFT Development 266 22 Imaging Inventions: Charge-Coupled Devices 273 Michael F. Tompsett 22.1 Setting the Stage for the Invention of the Charge-Coupled Device (CCD) 273 22.2 The Invention of the CCD 274 22.3 Verifying the CCD Concept 275 22.4 The Invention of CCD Imagers 276 22.5 The First Solid-State Color TV Camera 276 22.6 Mixed Analog Design Modem Chip 278 23 The Invention and Development of CMOS Image Sensors: A Camera in Every Pocket 281 Eric R. Fossum 23.1 Introduction 281 23.2 Underlying Technology 282 23.3 Early Solid-State Image Sensors 283 23.4 Invention of CMOS Image Sensors 285 23.5 Photon-Counting CMOS Image Sensors 288 23.6 Conclusion 290 24 From Transistors to Microsensors: A Memoir 293 Henry Baltes 24.1 Early Encounters 293 24.2 Integration 293 24.3 Silicon Sensors 294 24.4 Transistor Sensors 294 24.5 CMOS End Fabrication 296 24.6 Outlook 297 25 Creation of the Insulated Gate Bipolar Transistor 299 B. Jayant Baliga 25.1 Introduction 299 25.2 Historical Context 300 25.3 The Brock Effect 301 25.4 My IGBT Proposal 301 25.5 The Welch Edict 301 25.6 Manufacturing the First IGBT Product 302 25.7 First IGBT Product Release 303 25.8 IGBT Technology Enhancement 304 25.9 IGBT Evolution 305 25.10 IGBT Applications 306 25.11 IGBT Social Impact 306 25.12 My Sentiments 307 26 The History of Noise in Metal-Oxide-Semiconductor Field-Effect Transistors 309 Renuka P. Jindal 26.1 Introduction 309 26.2 MOSFET Noise Time Line 310 26.3 Channel Thermal Noise 311 26.4 Induced Gate and Substrate Current Noise 311 26.5 Gate-Drain Current Noise Cross Correlation 312 26.6 Equilibrium Noise 312 26.7 Bulk Charge Effects 312 26.8 Gate Resistance Noise 313 26.9 Substrate Resistance Noise 313 26.10 Substrate and Gate Current Noise 313 26.11 Short-Channel Effects 314 26.12 Effect on Channel Thermal Noise 315 26.13 1/f Noise 316 26.14 Conclusions 316 27 A Miraculously Reliable Transistor: A Short History 323 Muhammad Ashraful Alam and Ahmed Ehteshamul Islam 27.1 Introduction: A Transistor is Born 323 27.2 Transistor Reliability in the Proto-Scaling Era 325 27.3 Reliability of Geometric-and Equivalent-Scaling Eras 325 27.4 Conclusions: Reliability Challenges for the Hyper-Scaling and Functional-Scaling Eras 330 28 Technology Computer-Aided Design: A Key Component of Microelectronics' Development 337 Siegfried Selberherr and Viktor Sverdlov 28.1 Introduction 337 28.2 Short History 338 28.3 Scaling and Model Complexity 339 28.4 MINIMOS Commercialization and Beyond 342 28.5 Design Technology Co-Optimization at Advanced Nodes 343 28.6 Electron Spin for Microelectronics 343 28.7 Summary and Outlook 344 29 Early Integrated Circuits 349 Willy Sansen 30 A Path to the One-Chip Mixed-Signal SoC for Digital Video Systems 355 Akira Matsuzawa 30.1 Introduction 355 30.2 Bipolar ADCs at Early Development Stage of Digital TVs 356 30.3 A CMOS ADC for Digital Handy Camcorder 360 30.4 One-Chip Mixed-Signal SoC for DVD 363 31 Historical Perspective of the Nonvolatile Memory and Emerging Computing Paradigms 369 Ming Liu 31.1 Introduction 369 31.2 Rise of Solid-State Nonvolatile Memory 370 31.3 NVM in Classical Computer Architectures 373 31.4 NVM-Driven New Computing Paradigm 375 31.5 Conclusion 376 32 CMOS Enabling Quantum Computing 379 Edoardo Charbon 32.1 Why Cryogenic Electronics? 379 32.2 The Quantum Stack 380 32.3 Modeling Cryo-CMOS Devices 380 32.4 Specific Effects in Cryo-CMOS Transistors 383 32.5 Perspectives and Trends 383 33 Materials and Interfaces: How They Contributed to Transistor Development 387 Bruce Gnade 33.1 Introduction 387 33.2 Back-End-of-Line 388 33.3 Channel Materials 389 33.4 Gate Stack 390 33.5 Contacts 391 33.6 Summary 391 34 The Magic of MOSFET Manufacturing 393 Kelin J. Kuhn 34.1 Introduction 393 34.2 The Magic of MOS 394 34.3 The Magic of Self-alignment 397 34.4 The Magic of Semiconductor Manufacturing 398 34.5 Transistor Magic for the NEXT 75 Years? 400 35 Materials Innovation: Key to Past and Future Transistor Scaling 403 Tsu-Jae King Liu and Lars P. Tatum 35.1 Introduction 403 35.2 MOSFET Basics 404 35.3 Complementary MOS (CMOS) Technology 407 35.4 MOSFET Scaling Challenges 408 35.5 MOSFET Materials Innovations 410 35.6 Outlook for Continued Transistor Scaling 411 36 Germanium: Back to the Future 415 Krishna C. Saraswat 36.1 Introduction 415 36.2 Need for High Mobility Material for MOS Channel 417 36.3 Surface Passivation of Ge-Based MOSFETs 418 36.4 Low Resistance Contacts to Ge 420 36.5 Heteroepitaxial Growth of Ge on Si 422 36.6 Strained Ge and Heterostructure FETs 423 36.7 Nanoscale Ge FETs 425 36.8 Ge NMOSFETs 425 36.9 Ge-Based Novel Devices for Optical Interconnects 426 36.10 Summary 427 Acknowledgment 427 References 428 Index 431

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Arokia Nathan, PhD, formerly the Professor of Photonic Systems and Displays at the University of Cambridge, is currently a Bye Fellow and Graduate Tutor at Darwin College, Cambridge. Samar K. Saha, PhD, is an internationally recognized expert on IC device architecture, process and device simulation, and device modeling within the industry and academia. Ravi M. Todi, PhD, is well known in the semiconductor industry as a technical and business leader and currently serves as IEEE EDS President.

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